The job that system designers have to do has been getting tougher and tougher. Systems are increasingly complex, the stakes if things are delayed or go down are much higher, and the speed of turnaround is accelerating.

Kandou retimers have always been designed with a plug and play approach, minimizing the complexity, effort, and hands-on work required to implement them. They just work. You can’t afford the worst to happen, either at a dev stage or once the system is up and running. Here we look at our Regli PCIe retimers’ two built-in features that put system designers’ and OEMs’ minds at ease at both these stages: debugging and security.

Regli™ debugging: total transparency

Performance is the number one factor in choosing system deployments, but development costs are a significant consideration too. Understanding the states in the system can be tricky during the design and debug cycle. Measuring PCI signal integrity is a headache, typically requiring an expensive high-speed lab and multiple personnel is incredibly time-consuming. Identifying the proper triggers for external test equipment, manually dismantling and testing the hardware poses a whole array of potential issues, and it’s not uncommon to waste an entire day identifying the root cause of a signal glitch.

While there’s no magic wand, with Regli there are X-Ray specs. Regli was developed to provide transparency, accelerating design and reduced debugging times to prepare you for production far more quickly.

Firstly, Regli has an integrated AI scope that functions as an external oscilloscope. Essentially it provides system designers with a view of the electrical eye as it’s perceived into the part. So you can instantly see what signal integrity issues are bugging you, and resolve them.

It also has a bit error rate (BER) monitor and a logic analyzer showing you the incoming states both as a new endpoint or new Root complex during development. The result: instant visibility of any issues that arise. So designers can quickly isolate and identify the problem without ever needing to enter a high-speed lab.

But what about when your system is online, and hackers want to cause you problems?

Regli Security: as hackproof as it gets

Cyber security is a constant threat, something that all system designers – and internet users – have to live with now. One of the biggest users of PCIe and CXL retimers is hyperscalers and enterprise datacenters, for whom security is a major concern.

While PCIe has a really well-defined spec for security in terms of both the root complex and the endpoint, retimers sit outside of that. They have their own vulnerability and unique threat model.

While a 100% unhackable retimer is a pipe dream for now, we’ve put a lot of effort into making Regli the next best thing. Managing security is all about reducing the attack surfaces, and we’ve thought of everything. The first concern is flash memory. Each retimer has its own flash memory, and if this is accessed by an attacker, they could gain access to important configuration information, operational information such as BIOS, Bootloaders and other critical components.

While regular patching of server software can broadly mitigate this, retimers are increasingly sophisticated, which demands another set of firmware, and therefore another attack surface.

Another concern is a Denial of Service (DOS) attack. An attacker could target the side band signals for the retimer, blocking the PCI link so that endpoints such as accelerators or SSDs suddenly disappear from the system.

Kandou is one of the only retimer manufacturers to have in-house security personnel. Our team have designed Regli with secure boot capability as part of its base architecture, closing the attack surface from hackers. An integrated SHA256 accelerator, public Key OTP storage and programable MCU all mean that system designers and users can block threats and stay in control.

So with Regli you can remove security as a concern when planning the already complicated application of retimers across your system.