Signal Integrity Tools

KEYE™ Kandou Eye Software

Keye software splash screen

KEYE™ is Kandou's in-house GUI-based statistical eye simulator written in C++, capable of generating statistical eye diagrams for signal integrity analysis. Besides well-known signaling schemes such as NRZ and PAM4, KEYE™ is able to simulate our advanced chord signaling schemes over multi-wire channels. It includes optimization engines to find the best settings for various equalizers in the system which results in the best horizontal/vertical openings of the SerDes system. KEYE™ is capable of

  1. Building/cascading channel s-parameters, discrete elements, connectors, filters, etc
  2. Optimizing Tx FIR, CTLE and DFE blocks
  3. Handling channel/transmitter skew
  4. Handling Rj/Dj of the clocking system
  5. Handling package models
  6. Handling thermal noise
  7. Handling FEXT/NEXT sources

TAU™ Time Domain Analyzer

Tau software splash screen

TAU™ is Kandou's in-house GUI-based fast time-domain SerDes modeling tool written in C++, capable of simulating the non-linear time-variant nature of modern multi-wire serial links over several hundreds of millions of bits needed for reliable performance evaluation. Besides well-known signaling schemes such as NRZ and PAM4, It is capable of simulating our advanced chord signaling systems. The simulation speed can go easily up to 50 Kbits/sec on a single workstation. The system performance can be evaluated using vertical and horizontal bathtubs generated by the software together with all side information about clocking performance of the system. Time-domain waveforms at any point in the system can be visualized real-time for further diagnostics. TAU™ is capable of

  1. Simulating various sources for generating input bit sequences (PRBS, random, user-defined)
  2. Building/cascading channel s-parameters, discrete elements, connectors, filters, etc
  3. Simulating Multi-wire chord signaling
  4. Modeling skew
  5. Inserting FEXT/NEXT sources
  6. Simulating full PLL model in time-domain
  7. Simulating carrier and data recovery
  8. Simulating transmitter driver and equalization
  9. Handling Rx analog front-end (LTE, CTLE, VGA, noise, offset, non-linearity, freq response, pole-zero)
  10. Adding samplers (ISF, noise, offset)
  11. Simulating adaptation loops, state machines
  12. Simulating clocking impairments (DCD, Dj, Rj PSD, SJ)